The present invention is situated in the field of microelectronics and more precisely related to a method of forming a porous dielectric layer having a low dielectric constant for reducing capacity coupling on a semiconductor device.
Integrated circuits combine many transistors on a semiconductor, e.g. a single crystal silicon, chip to perform complex functions.
The continuing scaling down of transistor size makes very important the delay caused by resistance capacitance coupling of the interconnecting wiring. This effect limits achievable speed and degrades the noise margin used to insure proper device operation.
In order to decrease this parasitic capacitance, materials with a low dielectric constant (low k-materials) are continuously developed.
The most common semiconductor dielectric is silicon dioxide which has a dielectric constant of about 4. Air has a dielectric constant of 1.0, which makes it obvious to increase the amount of air incorporated in the dielectric layer without giving in on the mechanical strength of this dielectric layer.
Gnade discloses in EPA1/0684642 a process for creating a porous dielectric layer by using vacuum or ambient pressures to regulate the porosity.
Ahn discloses in WO 99/19910 an integrated circuit including one porous SiOC insulator, providing a dielectric constant lower than 2 for minimising parasitic capacitance. This document teaches a method using a coating and a pyrolysis of oxide and carbon sources.
The methods described in the state of the art are either complex or performed at very high temperatures (between 450 and 1200 degrees Celsius) and alters heavily the geometry of the silicon wafers and the integrated circuits formed on and in these silicon wafers or other substrates, liquefying most of the metals used in e.g. copper damascene back-end processing or e.g Aluminum-based metallisation schemes.
The problem to solve is the modification of the dielectric constant under soft physical and chemical conditions to preserve the geometry and the chemical composition of the porous insulating layer.
The aim of the present invention is to increase the porosity of the CVD Silicon-oxygen film under soft physical and chemical conditions to avoid any change of the chemical composition and of the material properties. These physical and chemical conditions are compatible with the substrates and the layers formed thereon.
An additional purpose of this invention is to prepare ultra low-k dielectric films with higher chemical stability compared to Nanoglass and porous SSQ based materials.
An aim of the invention is to substantially change the porosity of a dielectric film without substantially changing the thickness of this dielectric film.
The present invention provides a method to produce a porous dielectric such as a silicon-oxygen layer.
For the purpose of this invention, silicon-oxygen should be understood as an insulating layer comprising at least Si and O, e.g. SiO2, or at least Si, C and O, e.g. silicon oxycarbide (SiOC), or at least Si, N, O and C, e.g. nitrited silicon oxycarbide, or at least Si, C, O and H, e.g. hydrogenated SiOC, or at least Si, O, C, N and H, e.g. hydrogenated SiNOC, but is not limited hereto.
A first aspect of this invention discloses a method for forming a porous silicon-oxygen layer comprising the steps of applying the said layer on a substrate and exposing it to a HF ambient. Ambient should be understood as a gaseous mixture, a solution, a mist or a vapor.
A key feature of the present invention is that the concentration of the HF in the ambient is determined such that the etching increases the pore size from 1 to 3 nm, without altering the thickness of the silicon-oxygen layer.
In a preferred embodiment of the invention, a hydrogenated silicon oxycarbide layer is deposited by CVD.
A further aspect of the present invention is the determination of the optimum process conditions. That means the determination of the HF concentration to reach the ideal etching rate of the pores compared to the film.
The ideal HF concentration has been determined and is lower than 5% aqueous HF solution. Preferably the concentration of HF in the aqueous solution is lower than 2%. The HF concentration is depending on the pore size and of the nature of the silicon-oxygen layer.
The final aspect of the present invention is characterised in that the HF etching conditions are very soft and can occur at room temperature and at atmospheric pressure. The process conditions are compatible and integratible with existing semiconductor production process and materials. The process conditions doesn""t result in an substantial change in material characteristics and without marring the integrity of the semiconductor substrate or materials formed upon this semiconductor substrate.